PALCE22V10Q-25PC4

24-Pin, EE CMOS, Versatile PAL Device, DIP, -0.5 V to +7.0 V, 100 mA, PALCE22V10Q-25PC4

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PartNumber:: PALCE22V10Q-25PC4

Brand:: Lattice Semiconductor - Lattice | Pack: DIP | D/C: 10+

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Products Upload time: 2012-01-06

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Part Number:PALCE22V10Q-25PC4
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Product Summary

The PALCE22V10Q-25PC4 is a 24-Pin EE CMOS (Zero Power) Versatile PAL Device. It provides user-programmable logic for replacing conventional SSI/MSI gates and flip-flops at a reduced chip count. The PALCE22V10Q-25PC4 is an advanced PAL device built with zero-power, high-speed, electricallyerasable CMOS technology. It provides user-programmable logic for replacing conventional zeropower CMOS SSI/MSI gates and flip-flops at a reduced chip count. The PALCE22V10Q-25PC4 provides zero standby power and high speed. At 30 μA maximum standby current, the PALCE22V10Q-25PC4 allows battery-powered operation for an extended period.

Parametrics

PALCE22V10Q-25PC4 absolute maximum ratings: (1)Storage Temperature: -65℃ to +150℃; (2)Ambient Temperature with Power Applied: -55℃ to +125℃; (3)Supply Voltage with Respect to Ground: -0.5 V to +7.0 V; (4)DC Input Voltage: -0.5 V to VCC + 1.0 V; (5)DC Output or I/O Pin Voltage: -0.5 V to VCC + 1.0 V; (6)Static Discharge Voltage: 2001 V; (7)Latchup Current (TA = 0℃ to +75℃): 100 mA.

Features

PALCE22V10Q-25PC4 features: (1)As fast as 5-ns propagation delay and 142.8 MHz fMAX (external); (2)Low-power EE CMOS; (3)10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs; (4)Varied product term distribution allows up to 16 product terms per output for complex functions; (5)Peripheral Component Interconnect (PCI) compliant (-5/-7/-10); (6)Global asynchronous reset and synchronous preset for initialization; (7)Power-up reset for initialization and register preload for testability; (8)Extensive third-party software and programmer support; (9)24-pin SKINNY DIP, 24-pin SOIC, and 28-pin PLCC; (10)5-ns and 7.5-ns versions utilize split leadframes for improved performance.